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Chennai, India — Oct. 16, 2026 — Two final-year students from SRM Institute of Science and Technology (SRMIST) are getting attention this month for showing how university research in semiconductor devices can feed industry development. Speaking at Semiconductor Summit 2026, Khyathi Atmakuru and Dhruv John Sebastian presented a range of projects that include power semiconductors and security-hardened processor designs, including a silicon carbide diode developed with support from Indichip Semiconductor.
The event is part of a broader shift in Indian technical education: universities are treating undergraduate research as a serious starting point for careers in chip design. For SRMIST, that means giving students access to the same kinds of tools and review loops used by professional engineering teams.
The institute's power-semiconductor work focuses on components that manage high voltage and current. The student portfolio covers silicon carbide (SiC) diodes, metal-oxide-semiconductor field-effect transistors (MOSFETs), and insulated-gate bipolar transistors (IGBTs) for railway applications.
To optimize each design, the group uses specialized simulation tools that let them adjust device geometry, doping concentrations, and electric-field distribution. The aim is simple: achieve higher breakdown voltage, lower losses, and better long-term reliability.
The Indichip-supported SiC diode is a highlight of this applied approach. Indichip Semiconductor supported the design and fabrication of the device, pushing students to think about constraints that go far beyond a simulation file. The students describe a workflow that starts with problem statements straight from industry. Their designs are reviewed by engineers and returned for optimization, and only then do the devices go toward fabrication and packaging.
That closed loop between academia and industry is still uncommon at the undergraduate level. It also gives students a sense of how commercial chip development differs from classroom theory.
The applications for these components extend well beyond trains. Power electronics are a critical layer in electric vehicles, renewable-energy systems, industrial drives, and the power supplies that keep AI data centers running. In all of those environments, the requirement is high-efficiency power conversion under extreme conditions.
SiC-based devices, in particular, have become a focus because they can operate at higher temperatures and switching frequencies than traditional silicon. Atmakuru and Sebastian pointed out that even a modest improvement in switching performance can be significant over the lifetime of a power converter. Less heat, less wasted electricity, and better voltage handling all matter in systems that consume megawatts.
On the processor side, Sebastian presented his research on a secure trap-handling architecture for a three-stage RISC-V processor. The results were shared at the Pan Asia Conference on Circuits and Systems at National Sun Yat-sen University in Taiwan in September 2026.
Trap handling, he explained, is how a central processing unit reacts when something unexpected interrupts it: the CPU must identify the problem, save the important state it was working on, and recover without corrupting ordinary tasks. Sebastian used Xilinx Vivado to design and simulate the architecture, then evaluated the output with waveform analysis and performance checks.
He sees potential applications in embedded systems, real-time control, and security-critical computing. In those fields, a processor must continue operating safely even when a fault is triggered by a hardware bug or a malicious attack.
SRMIST supports the work with a series of specialized facilities. Students have access to VLSI simulation, semiconductor fabrication, and process-integration laboratories. The student-run Semiconductor Chip Design Club also helps undergraduates get involved early in chip design. The institute says this is a deliberate push: research should not wait until graduate school.
The effort aligns with India's broader strategy to build a domestic semiconductor ecosystem. The India Semiconductor Mission is meant to attract manufacturing and design investment, but a steady pipeline of engineers who have already worked on industry-driven projects is just as important. Collaborative research with companies such as Indichip is one way to build that talent pool.
As Semiconductor Summit 2026 showed, the next phase of India's chip story will not be built only in Silicon Valley or Hsinchu. It will also be built in university labs where students are learning to balance performance targets with real-world manufacturability. The presence of a student-led chip design club points to a generation that is treating hardware with the same enthusiasm previous generations gave to software.
For American readers, this story is also a supply-chain signal. As the United States works to strengthen its own chip industry, it is paying close attention to where the next generation of semiconductor engineers is trained. Wide-bandgap power devices and RISC-V security are both areas where the global center of gravity is shifting beyond the traditional hubs.
Industry observers note that silicon carbide is one of the fastest-growing segments in power electronics. U.S. chip companies and system integrators regularly look for engineers who understand both power devices and secure processor architectures. A student who has presented at an international conference and worked with a commercial semiconductor partner is already a step ahead when it comes to joining a U.S. design team.
The Semiconductor Summit 2026 appearance was not just another campus event. It is a small but visible example of how universities can create a bridge between theory and silicon. For Khyathi Atmakuru and Dhruv John Sebastian, the journey from problem statement to design review to fabrication is a lesson no textbook can fully deliver.
Both projects also reflect a wider global trend: open standards such as RISC-V are becoming more visible in university curricula, allowing students to test security ideas without licensing a proprietary core. When universities combine that flexibility with power-device research, they produce graduates who can help build the next generation of chips.
